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Advanced Computer
Architecture-CS501
________________________________________________________
Advanced
Computer Architecture
Lecture
No. 38
Reading
Material
Vincent
P. Heuring & Harry F. Jordan
Chapter
7
Computer
Systems Design and Architecture
7.2.6,
7.3
Summary
·
Memory
Modules
·
Read
Only Memory (ROM)
·
Cache
Memory
Module
Static
RAM chips can be assembled into systems
without changing the
timing
characteristics
of a memory access. Dynamic RAM
chips, however, have enough
timing
complexity
that a memory module built
from dynamic RAM chips will
have complex
control.
The cause of timing
complexity is the time-multiplexed
row and column
addresses,
and the refresh
operation.
Word
Assembly from Narrow
Chips
Chips can
be combined to expand the
memory word size while
keeping the same
number
of words.
Address, chip select, and R/W signals
are connected in parallel to
all the chips.
Only
the data signals are
kept separate, with those
from each chip supplying
different bits
of the
wider word. For high
capacity memory chips,
narrow words are used.
This is
because
adding a data pin to a chip
with 2m words of s bits
increases the number of bits
it
can store by
only a factor of (s+1)/s,
while adding an address pin
always doubles the
capacity.
Dynamic RAM
Module with Refresh
Control
For
Dynamic RAM chips the total
address is divided into row
and column address.
Row
address
strobe signal RAS and a column strobe
signal CAS are used to
differentiate
between
these two signals.
Read
Only Memory (ROM)
ROM is
the read-only memory which
contains permanent pattern of
data that cannot be
changed. ROM is
nonvolatile i.e. it retains
the information in it when
power is removed
from
it. Different types of ROMs
are discussed below.
PROM
Page
347
Last
Modified: 01-Nov-06
Advanced Computer
Architecture-CS501
________________________________________________________
The
PROM stands for Programmable
Read only Memory. It is also
nonvolatile and may
be
written into only once.
For PROM, the writing
process is performed electrically in
the
field.
PROMs provide flexibility and
convenience.
EPROM
Erasable
Programmable Read-only Memory or
EPROM chips have quartz
windows and
by
applying ultraviolet light
erase the data can be erased
from the EPROM. Data can
be
restored in an
EPROM after erasure. EPROMs
are more expensive than
PROMs and are
generally
used for prototyping or
small-quantity, special purpose
work.
EEPROM
EEPROM
stands for Electrically
Erasable Programmable Read-only
Memory. This is a
read-mostly
memory that can be written
into at any time without
erasing prior contents;
only
the byte or bytes addressed
are updated. The write
operation takes
considerably
longer
than the read operation. It
is more expensive than
EPROM.
Flash
Memory
An entire
flash memory can be erased in one or a
few seconds, which is much
faster than
EPROM. In
addition, it is possible to erase just
blocks of memory rather than
an entire
chip.
Cache
Cache by
definition is a place for safe
storage and provides the fastest possible
storage
after
the registers. The cache
contains a copy of portions of
the main memory. When
the
CPU
attempts to read a word from
memory, a check is made to
determine if the word
is
in the
cache. If so, the word is
delivered to the CPU. If
not, a block of the main
memory,
consisting
of some fixed number of
words, is read into the
cache and then the word
is
delivered
to the CPU.
Spatial
Locality
This
would mean that in a part of a
program, if we have a particular
address being
accessed
then it is highly probable
that the data available at
the next address would
be
highly
accessed.
Temporal
Correlation
In this
case, we say that at a particular
time, if we have utilized a
particular part of
the
memory
then we might access the
adjacent parts very
soon.
Cache
Hit and Miss
When
the CPU needs some
data, it communicates with
the cache, and if the data
is
available
in the cache, we say that a
cache hit has occured. If
the data is not available
in
the
cache then it interacts with
the main memory and fetches
an appropriate block of
data.
This is a
cache miss.
Page
348
Last
Modified: 01-Nov-06